nds32-tdep.h 1.7 KB

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  1. /* Target-dependent code for the NDS32 architecture, for GDB.
  2. Copyright (C) 2013-2022 Free Software Foundation, Inc.
  3. Contributed by Andes Technology Corporation.
  4. This file is part of GDB.
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 3 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program. If not, see <http://www.gnu.org/licenses/>. */
  15. #ifndef NDS32_TDEP_H
  16. #define NDS32_TDEP_H
  17. #include "gdbarch.h"
  18. enum nds32_regnum
  19. {
  20. /* General purpose registers. */
  21. NDS32_R0_REGNUM = 0,
  22. NDS32_R5_REGNUM = 5,
  23. NDS32_TA_REGNUM = 15, /* Temporary register. */
  24. NDS32_FP_REGNUM = 28, /* Frame pointer. */
  25. NDS32_GP_REGNUM = 29, /* Global pointer. */
  26. NDS32_LP_REGNUM = 30, /* Link pointer. */
  27. NDS32_SP_REGNUM = 31, /* Stack pointer. */
  28. NDS32_PC_REGNUM = 32, /* Program counter. */
  29. NDS32_NUM_REGS,
  30. /* The first double precision floating-point register. */
  31. NDS32_FD0_REGNUM = NDS32_NUM_REGS,
  32. };
  33. struct nds32_gdbarch_tdep : gdbarch_tdep
  34. {
  35. /* The guessed FPU configuration. */
  36. int fpu_freg = 0;
  37. /* FSRs are defined as pseudo registers. */
  38. int use_pseudo_fsrs = 0;
  39. /* Cached regnum of the first FSR (FS0). */
  40. int fs0_regnum = 0;
  41. /* ELF ABI info. */
  42. int elf_abi = 0;
  43. };
  44. #endif /* NDS32_TDEP_H */