ChangeLog-2008 35 KB

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  1. 2008-12-30 Martin Schwidefsky <schwidefskyy@de.ibm.com>
  2. * s390-opc.txt: Add ptff instruction.
  3. 2008-12-24 Jan Kratochvil <jan.kratochvil@redhat.com>
  4. * Makefile.am (CFILES, ALL_MACHINES): Add LM32 source and object files.
  5. * Makefile.in: Regenerate.
  6. 2008-12-23 Jon Beniston <jon@beniston.com>
  7. * Makefile.am: Add LM32 object files and dependencies.
  8. * Makefile.in: Regenerate.
  9. * configure.in: Add LM32 target.
  10. * configure: Regenerate.
  11. * disassemble.c: Add LM32 disassembler.
  12. * cgen-asm.in: Update copyright year.
  13. * cgen-dis.in: Update copyright year.
  14. * cgen-ibld.in: Update copyright year.
  15. * lm32-asm.c: New file.
  16. * lm32-desc.c: New file.
  17. * lm32-desc.h: New file.
  18. * lm32-dis.c: New file.
  19. * lm32-ibld.c: New file.
  20. * lm32-opc.c: New file.
  21. * lm32-opc.h: New file.
  22. * lm32-opinst.c: New file.
  23. 2008-12-23 H.J. Lu <hongjiu.lu@intel.com>
  24. * i386-dis.c (EXdS): New.
  25. (EXdVexS): Likewise.
  26. (EXqVexS): Likewise.
  27. (d_swap_mode): Likewise.
  28. (q_mode): Updated.
  29. (prefix_table): Use EXdS on movss and EXqS on movsd.
  30. (vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
  31. (intel_operand_size): Handle d_swap_mode.
  32. (OP_EX): Likewise.
  33. * i386-opc.h (S): Update comments.
  34. * i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
  35. * i386-tbl.h: Regenerated.
  36. 2008-12-23 Nick Clifton <nickc@redhat.com>
  37. * po/ga.po: Updated Irish translation.
  38. 2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
  39. * i386-dis.c (EbS): New.
  40. (EvS): Likewise.
  41. (EMS): Likewise.
  42. (EXqS): Likewise.
  43. (EXxS): Likewise.
  44. (b_swap_mode): Likewise.
  45. (v_swap_mode): Likewise.
  46. (q_swap_mode): Likewise.
  47. (x_swap_mode): Likewise.
  48. (v_mode): Updated.
  49. (w_mode): Likewise.
  50. (t_mode): Likewise.
  51. (xmm_mode): Likewise.
  52. (swap_operand): Likewise.
  53. (dis386): Use EbS on movB. Use EvS on moveS.
  54. (dis386_twobyte): Use EXxS on movapX.
  55. (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
  56. vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
  57. (vex_table): Use EXxS on vmovapX.
  58. (vex_len_table): Use EXqS on vmovq.
  59. (intel_operand_size): Handle b_swap_mode, v_swap_mode,
  60. q_swap_mode and x_swap_mode.
  61. (OP_E_register): Handle b_swap_mode and v_swap_mode.
  62. (OP_EM): Handle v_swap_mode.
  63. (OP_EX): x_swap_mode and q_swap_mode.
  64. * i386-gen.c (opcode_modifiers): Add S.
  65. * i386-opc.h (S): New.
  66. (Modrm): Updated.
  67. (i386_opcode_modifier): Add s.
  68. * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
  69. movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
  70. * i386-tbl.h: Regenerated.
  71. 2008-12-18 H.J. Lu <hongjiu.lu@intel.com>
  72. * i386-dis.c (mnemonicendp): New.
  73. (op): Likewise.
  74. (print_insn): Use mnemonicendp.
  75. (OP_3DNowSuffix): Likewise.
  76. (CMP_Fixup): Likewise.
  77. (CMPXCHG8B_Fixup): Likewise.
  78. (CRC32_Fixup): Likewise.
  79. (OP_DREX_FCMP): Likewise.
  80. (OP_DREX_ICMP): Likewise.
  81. (VZERO_Fixup): Likewise.
  82. (VCMP_Fixup): Likewise.
  83. (PCLMUL_Fixup): Likewise.
  84. (VPERMIL2_Fixup): Likewise.
  85. (MOVBE_Fixup): Likewise.
  86. (putop): Update mnemonicendp.
  87. (oappend): Use stpcpy.
  88. (simd_cmp_op): Changed to struct op.
  89. (vex_cmp_op): Likewise.
  90. (pclmul_op): Likewise.
  91. (vpermil2_op): Likewise.
  92. 2008-12-18 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
  93. * configure: Regenerate.
  94. 2008-12-15 Richard Earnshaw <rearnsha@arm.com>
  95. * arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
  96. unified syntax.
  97. 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
  98. * i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
  99. 2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
  100. * i386-dis.c (putop): Remove strayed comments.
  101. 2008-12-04 Ben Elliston <bje@au.ibm.com>
  102. * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
  103. for -Mbooke.
  104. (print_ppc_disassembler_options): Update usage.
  105. * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
  106. (BOOKE64): Remove.
  107. (PPCCHLK64): Likewise.
  108. (powerpc_opcodes): Remove all BOOKE64 instructions.
  109. 2008-11-28 Joshua Kinard <kumba@gentoo.org>
  110. * mips-dis.c (mips_arch_choices): Add r14000, r16000.
  111. 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  112. * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
  113. adjusted the mask for 32-bit branch instruction.
  114. 2008-11-27 Alan Modra <amodra@bigpond.net.au>
  115. * ppc-opc.c (extract_sprg): Correct operand range check.
  116. 2008-11-26 Andreas Schwab <schwab@suse.de>
  117. * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
  118. (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
  119. (save_printer, save_print_address): Remove.
  120. (fetch_data): Don't use them.
  121. (match_insn_m68k): Always restore printing functions.
  122. (print_insn_m68k): Don't save/restore printing functions.
  123. 2008-11-25 Nick Clifton <nickc@redhat.com>
  124. * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
  125. 2008-11-18 Catherine Moore <clm@codesourcery.com>
  126. * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
  127. instructions.
  128. (neon_opcodes): Likewise.
  129. (print_insn_coprocessor): Print 't' or 'b' for vcvt
  130. instructions.
  131. 2008-11-14 Tristan Gingold <gingold@adacore.com>
  132. * makefile.vms (OBJS): Update list of objects.
  133. (DEFS): Update
  134. (CFLAGS): Update.
  135. 2008-11-06 Chao-ying Fu <fu@mips.com>
  136. * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
  137. before sync.
  138. (sync): New instruction with 5-bit sync type.
  139. * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
  140. 2008-11-06 Nick Clifton <nickc@redhat.com>
  141. * avr-dis.c: Replace uses of sprintf without a format string with
  142. calls to strcpy.
  143. 2008-11-03 H.J. Lu <hongjiu.lu@intel.com>
  144. * i386-opc.tbl: Add cmovpe and cmovpo.
  145. * i386-tbl.h: Regenerated.
  146. 2008-10-22 Nick Clifton <nickc@redhat.com>
  147. PR 6937
  148. * configure.in (SHARED_LIBADD): Revert previous change.
  149. Add a comment explaining why.
  150. (SHARED_DEPENDENCIES): Revert previous change.
  151. * configure: Regenerate.
  152. 2008-10-10 Nick Clifton <nickc@redhat.com>
  153. PR 6937
  154. * configure.in (SHARED_LIBADD): Add libiberty.a.
  155. (SHARED_DEPENDENCIES): Add libiberty.a.
  156. 2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
  157. * i386-gen.c: Include "hashtab.h".
  158. (next_field): Take a new argument, last. Check last.
  159. (process_i386_cpu_flag): Updated.
  160. (process_i386_opcode_modifier): Likewise.
  161. (process_i386_operand_type): Likewise.
  162. (process_i386_registers): Likewise.
  163. (output_i386_opcode): New.
  164. (opcode_hash_entry): Likewise.
  165. (opcode_hash_table): Likewise.
  166. (opcode_hash_hash): Likewise.
  167. (opcode_hash_eq): Likewise.
  168. (process_i386_opcodes): Use opcode hash table and opcode array.
  169. 2008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
  170. * s390-opc.txt (stdy, stey): Fix description
  171. 2008-09-30 Alan Modra <amodra@bigpond.net.au>
  172. * Makefile.am: Run "make dep-am".
  173. * Makefile.in: Regenerate.
  174. 2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
  175. * aclocal.m4: Regenerated.
  176. * configure: Likewise.
  177. * Makefile.in: Likewise.
  178. 2008-09-29 Nick Clifton <nickc@redhat.com>
  179. * po/vi.po: Updated Vietnamese translation.
  180. * po/fr.po: Updated French translation.
  181. 2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
  182. * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
  183. (cfxr, cfdr, cfer, clclu): Add esa flag.
  184. (sqd): Instruction added.
  185. (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
  186. * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
  187. 2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
  188. * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
  189. (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
  190. 2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
  191. * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
  192. * i386-tbl.h: Regenerated.
  193. 2008-08-28 Jan Beulich <jbeulich@novell.com>
  194. * i386-dis.c (dis386): Adjust far return mnemonics.
  195. * i386-opc.tbl: Add retf.
  196. * i386-tbl.h: Re-generate.
  197. 2008-08-28 Jan Beulich <jbeulich@novell.com>
  198. * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
  199. 2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
  200. * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
  201. * ia64-gen.c (lookup_specifier): Likewise.
  202. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
  203. * ia64-raw.tbl: Likewise.
  204. * ia64-waw.tbl: Likewise.
  205. * ia64-asmtab.c: Regenerated.
  206. 2008-08-27 H.J. Lu <hongjiu.lu@intel.com>
  207. * i386-opc.tbl: Correct fidivr operand size.
  208. * i386-tbl.h: Regenerated.
  209. 2008-08-24 Alan Modra <amodra@bigpond.net.au>
  210. * configure.in: Update a number of obsolete autoconf macros.
  211. * aclocal.m4: Regenerate.
  212. 2008-08-20 H.J. Lu <hongjiu.lu@intel.com>
  213. AVX Programming Reference (August, 2008)
  214. * i386-dis.c (PREFIX_VEX_38DB): New.
  215. (PREFIX_VEX_38DC): Likewise.
  216. (PREFIX_VEX_38DD): Likewise.
  217. (PREFIX_VEX_38DE): Likewise.
  218. (PREFIX_VEX_38DF): Likewise.
  219. (PREFIX_VEX_3ADF): Likewise.
  220. (VEX_LEN_38DB_P_2): Likewise.
  221. (VEX_LEN_38DC_P_2): Likewise.
  222. (VEX_LEN_38DD_P_2): Likewise.
  223. (VEX_LEN_38DE_P_2): Likewise.
  224. (VEX_LEN_38DF_P_2): Likewise.
  225. (VEX_LEN_3ADF_P_2): Likewise.
  226. (PREFIX_VEX_3A04): Updated.
  227. (VEX_LEN_3A06_P_2): Likewise.
  228. (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
  229. PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
  230. (x86_64_table): Likewise.
  231. (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
  232. VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
  233. VEX_LEN_3ADF_P_2.
  234. * i386-opc.tbl: Add AES + AVX instructions.
  235. * i386-init.h: Regenerated.
  236. * i386-tbl.h: Likewise.
  237. 2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
  238. * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
  239. * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
  240. 2008-08-15 Alan Modra <amodra@bigpond.net.au>
  241. PR 6526
  242. * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
  243. * Makefile.in: Regenerate.
  244. * aclocal.m4: Regenerate.
  245. * config.in: Regenerate.
  246. * configure: Regenerate.
  247. 2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
  248. PR 6825
  249. * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
  250. 2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
  251. * i386-opc.tbl: Add syscall and sysret for Cpu64.
  252. * i386-tbl.h: Regenerated.
  253. 2008-08-04 Alan Modra <amodra@bigpond.net.au>
  254. * Makefile.am (POTFILES.in): Set LC_ALL=C.
  255. * Makefile.in: Regenerate.
  256. * po/POTFILES.in: Regenerate.
  257. 2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
  258. * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
  259. (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
  260. (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
  261. * ppc-opc.c (insert_xt6): New static function.
  262. (extract_xt6): Likewise.
  263. (insert_xa6): Likewise.
  264. (extract_xa6: Likewise.
  265. (insert_xb6): Likewise.
  266. (extract_xb6): Likewise.
  267. (insert_xb6s): Likewise.
  268. (extract_xb6s): Likewise.
  269. (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
  270. XX3DM_MASK, PPCVSX): New.
  271. (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
  272. "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
  273. 2008-08-01 Pedro Alves <pedro@codesourcery.com>
  274. * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
  275. * Makefile.in: Regenerate.
  276. 2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
  277. * i386-reg.tbl: Use Dw2Inval on AVX registers.
  278. * i386-tbl.h: Regenerated.
  279. 2008-07-30 Michael J. Eager <eager@eagercon.com>
  280. * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
  281. * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
  282. (insert_sprg, PPC405): Use PPC_OPCODE_405.
  283. (powerpc_opcodes): Add Xilinx APU related opcodes.
  284. 2008-07-30 Alan Modra <amodra@bigpond.net.au>
  285. * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
  286. 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
  287. * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
  288. 2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
  289. * mips-opc.c (CP): New macro.
  290. (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
  291. membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
  292. dmtc2 Octeon instructions.
  293. 2008-07-07 Stan Shebs <stan@codesourcery.com>
  294. * dis-init.c (init_disassemble_info): Init endian_code field.
  295. * arm-dis.c (print_insn): Disassemble code according to
  296. setting of endian_code.
  297. (print_insn_big_arm): Detect when BE8 extension flag has been set.
  298. 2008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
  299. * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
  300. for ELF symbols.
  301. 2008-06-25 Peter Bergner <bergner@vnet.ibm.com>
  302. * ppc-dis.c (powerpc_init_dialect): Handle -M464.
  303. (print_ppc_disassembler_options): Likewise.
  304. * ppc-opc.c (PPC464): Define.
  305. (powerpc_opcodes): Add mfdcrux and mtdcrux.
  306. 2008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
  307. * configure: Regenerate.
  308. 2008-06-13 Peter Bergner <bergner@vnet.ibm.com>
  309. * ppc-dis.c (print_insn_powerpc): Update prototye to use new
  310. ppc_cpu_t typedef.
  311. (struct dis_private): New.
  312. (POWERPC_DIALECT): New define.
  313. (powerpc_dialect): Renamed to...
  314. (powerpc_init_dialect): This. Update to use ppc_cpu_t and
  315. struct dis_private.
  316. (print_insn_big_powerpc): Update for using structure in
  317. info->private_data.
  318. (print_insn_little_powerpc): Likewise.
  319. (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
  320. (skip_optional_operands): Likewise.
  321. (print_insn_powerpc): Likewise. Remove initialization of dialect.
  322. * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
  323. extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
  324. extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
  325. extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
  326. insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
  327. insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
  328. insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
  329. param to be of type ppc_cpu_t. Update prototype.
  330. 2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
  331. * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
  332. +s, +S.
  333. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
  334. baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
  335. syncw, syncws, vm3mulu, vm0 and vmulu.
  336. * mips-dis.c (print_insn_args): Handle field descriptor +Q.
  337. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
  338. seqi, sne and snei.
  339. 2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
  340. * i386-opc.tbl: Add vmovd with 64bit operand.
  341. * i386-tbl.h: Regenerated.
  342. 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
  343. * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
  344. 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
  345. * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
  346. * i386-tbl.h: Regenerated.
  347. 2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
  348. PR gas/6517
  349. * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
  350. into 32bit and 64bit. Remove Reg64|Qword and add
  351. IgnoreSize|No_qSuf on 32bit version.
  352. * i386-tbl.h: Regenerated.
  353. 2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
  354. * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
  355. * i386-tbl.h: Regenerated.
  356. 2008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  357. * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
  358. 2008-05-14 Alan Modra <amodra@bigpond.net.au>
  359. * Makefile.am: Run "make dep-am".
  360. * Makefile.in: Regenerate.
  361. 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
  362. * i386-dis.c (MOVBE_Fixup): New.
  363. (Mo): Likewise.
  364. (PREFIX_0F3880): Likewise.
  365. (PREFIX_0F3881): Likewise.
  366. (PREFIX_0F38F0): Updated.
  367. (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
  368. PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
  369. (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
  370. * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
  371. CPU_EPT_FLAGS.
  372. (cpu_flags): Add CpuMovbe and CpuEPT.
  373. * i386-opc.h (CpuMovbe): New.
  374. (CpuEPT): Likewise.
  375. (CpuLM): Updated.
  376. (i386_cpu_flags): Add cpumovbe and cpuept.
  377. * i386-opc.tbl: Add entries for movbe and EPT instructions.
  378. * i386-init.h: Regenerated.
  379. * i386-tbl.h: Likewise.
  380. 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
  381. * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
  382. the two drem and the two dremu macros.
  383. 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
  384. * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
  385. instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
  386. cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
  387. INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
  388. 2008-04-25 David S. Miller <davem@davemloft.net>
  389. * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
  390. instead of %sys_tick_cmpr, as suggested in architecture manuals.
  391. 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
  392. * aclocal.m4: Regenerate.
  393. * configure: Regenerate.
  394. 2008-04-23 David S. Miller <davem@davemloft.net>
  395. * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
  396. extended values.
  397. (prefetch_table): Add missing values.
  398. 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
  399. * i386-gen.c (opcode_modifiers): Add NoAVX.
  400. * i386-opc.h (NoAVX): New.
  401. (OldGcc): Updated.
  402. (i386_opcode_modifier): Add noavx.
  403. * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
  404. instructions which don't have AVX equivalent.
  405. * i386-tbl.h: Regenerated.
  406. 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
  407. * i386-dis.c (OP_VEX_FMA): New.
  408. (OP_EX_VexImmW): Likewise.
  409. (VexFMA): Likewise.
  410. (Vex128FMA): Likewise.
  411. (EXVexImmW): Likewise.
  412. (get_vex_imm8): Likewise.
  413. (OP_EX_VexReg): Likewise.
  414. (vex_i4_done): Renamed to ...
  415. (vex_w_done): This.
  416. (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
  417. and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
  418. FMA instructions.
  419. (print_insn): Updated.
  420. (OP_EX_VexW): Rewrite to swap register in VEX with EX.
  421. (OP_REG_VexI4): Check invalid high registers.
  422. 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
  423. Michael Meissner <michael.meissner@amd.com>
  424. * i386-opc.tbl: Fix protX to allow memory in the middle operand.
  425. * i386-tbl.h: Regenerate from i386-opc.tbl.
  426. 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
  427. * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
  428. accept Power E500MC instructions.
  429. (print_ppc_disassembler_options): Document -Me500mc.
  430. * ppc-opc.c (DUIS, DUI, T): New.
  431. (XRT, XRTRA): Likewise.
  432. (E500MC): Likewise.
  433. (powerpc_opcodes): Add new Power E500MC instructions.
  434. 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
  435. * s390-dis.c (init_disasm): Evaluate disassembler_options.
  436. (print_s390_disassembler_options): New function.
  437. * disassemble.c (disassembler_usage): Invoke
  438. print_s390_disassembler_options.
  439. 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
  440. * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
  441. of local variables used for mnemonic parsing: prefix, suffix and
  442. number.
  443. 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
  444. * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
  445. extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
  446. (s390_crb_extensions): New extensions table.
  447. (insertExpandedMnemonic): Handle '$' tag.
  448. * s390-opc.txt: Remove conditional jump variants which can now
  449. be expanded automatically.
  450. Replace '*' tag with '$' in the compare and branch instructions.
  451. 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
  452. * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
  453. (PREFIX_VEX_3AXX): Likewis.
  454. 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
  455. * i386-opc.tbl: Remove 4 extra blank lines.
  456. 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
  457. * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
  458. with CPU_PCLMUL_FLAGS/CpuPCLMUL.
  459. (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
  460. * i386-opc.tbl: Likewise.
  461. * i386-opc.h (CpuCLMUL): Renamed to ...
  462. (CpuPCLMUL): This.
  463. (CpuFMA): Updated.
  464. (i386_cpu_flags): Replace cpuclmul with cpupclmul.
  465. * i386-init.h: Regenerated.
  466. 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
  467. * i386-dis.c (OP_E_register): New.
  468. (OP_E_memory): Likewise.
  469. (OP_VEX): Likewise.
  470. (OP_EX_Vex): Likewise.
  471. (OP_EX_VexW): Likewise.
  472. (OP_XMM_Vex): Likewise.
  473. (OP_XMM_VexW): Likewise.
  474. (OP_REG_VexI4): Likewise.
  475. (PCLMUL_Fixup): Likewise.
  476. (VEXI4_Fixup): Likewise.
  477. (VZERO_Fixup): Likewise.
  478. (VCMP_Fixup): Likewise.
  479. (VPERMIL2_Fixup): Likewise.
  480. (rex_original): Likewise.
  481. (rex_ignored): Likewise.
  482. (Mxmm): Likewise.
  483. (XMM): Likewise.
  484. (EXxmm): Likewise.
  485. (EXxmmq): Likewise.
  486. (EXymmq): Likewise.
  487. (Vex): Likewise.
  488. (Vex128): Likewise.
  489. (Vex256): Likewise.
  490. (VexI4): Likewise.
  491. (EXdVex): Likewise.
  492. (EXqVex): Likewise.
  493. (EXVexW): Likewise.
  494. (EXdVexW): Likewise.
  495. (EXqVexW): Likewise.
  496. (XMVex): Likewise.
  497. (XMVexW): Likewise.
  498. (XMVexI4): Likewise.
  499. (PCLMUL): Likewise.
  500. (VZERO): Likewise.
  501. (VCMP): Likewise.
  502. (VPERMIL2): Likewise.
  503. (xmm_mode): Likewise.
  504. (xmmq_mode): Likewise.
  505. (ymmq_mode): Likewise.
  506. (vex_mode): Likewise.
  507. (vex128_mode): Likewise.
  508. (vex256_mode): Likewise.
  509. (USE_VEX_C4_TABLE): Likewise.
  510. (USE_VEX_C5_TABLE): Likewise.
  511. (USE_VEX_LEN_TABLE): Likewise.
  512. (VEX_C4_TABLE): Likewise.
  513. (VEX_C5_TABLE): Likewise.
  514. (VEX_LEN_TABLE): Likewise.
  515. (REG_VEX_XX): Likewise.
  516. (MOD_VEX_XXX): Likewise.
  517. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
  518. (PREFIX_0F3A44): Likewise.
  519. (PREFIX_0F3ADF): Likewise.
  520. (PREFIX_VEX_XXX): Likewise.
  521. (VEX_OF): Likewise.
  522. (VEX_OF38): Likewise.
  523. (VEX_OF3A): Likewise.
  524. (VEX_LEN_XXX): Likewise.
  525. (vex): Likewise.
  526. (need_vex): Likewise.
  527. (need_vex_reg): Likewise.
  528. (vex_i4_done): Likewise.
  529. (vex_table): Likewise.
  530. (vex_len_table): Likewise.
  531. (OP_REG_VexI4): Likewise.
  532. (vex_cmp_op): Likewise.
  533. (pclmul_op): Likewise.
  534. (vpermil2_op): Likewise.
  535. (m_mode): Updated.
  536. (es_reg): Likewise.
  537. (PREFIX_0F38F0): Likewise.
  538. (PREFIX_0F3A60): Likewise.
  539. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
  540. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
  541. and PREFIX_VEX_XXX entries.
  542. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
  543. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
  544. PREFIX_0F3ADF.
  545. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
  546. Add MOD_VEX_XXX entries.
  547. (ckprefix): Initialize rex_original and rex_ignored. Store the
  548. REX byte in rex_original.
  549. (get_valid_dis386): Handle the implicit prefix in VEX prefix
  550. bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
  551. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
  552. calling get_valid_dis386. Use rex_original and rex_ignored when
  553. printing out REX.
  554. (putop): Handle "XY".
  555. (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
  556. ymmq_mode.
  557. (OP_E_extended): Updated to use OP_E_register and
  558. OP_E_memory.
  559. (OP_XMM): Handle VEX.
  560. (OP_EX): Likewise.
  561. (XMM_Fixup): Likewise.
  562. (CMP_Fixup): Use ARRAY_SIZE.
  563. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
  564. CPU_FMA_FLAGS and CPU_AVX_FLAGS.
  565. (operand_type_init): Add OPERAND_TYPE_REGYMM and
  566. OPERAND_TYPE_VEX_IMM4.
  567. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
  568. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
  569. VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
  570. VexImmExt and SSE2AVX.
  571. (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
  572. * i386-opc.h (CpuAVX): New.
  573. (CpuAES): Likewise.
  574. (CpuCLMUL): Likewise.
  575. (CpuFMA): Likewise.
  576. (Vex): Likewise.
  577. (Vex256): Likewise.
  578. (VexNDS): Likewise.
  579. (VexNDD): Likewise.
  580. (VexW0): Likewise.
  581. (VexW1): Likewise.
  582. (Vex0F): Likewise.
  583. (Vex0F38): Likewise.
  584. (Vex0F3A): Likewise.
  585. (Vex3Sources): Likewise.
  586. (VexImmExt): Likewise.
  587. (SSE2AVX): Likewise.
  588. (RegYMM): Likewise.
  589. (Ymmword): Likewise.
  590. (Vex_Imm4): Likewise.
  591. (Implicit1stXmm0): Likewise.
  592. (CpuXsave): Updated.
  593. (CpuLM): Likewise.
  594. (ByteOkIntel): Likewise.
  595. (OldGcc): Likewise.
  596. (Control): Likewise.
  597. (Unspecified): Likewise.
  598. (OTMax): Likewise.
  599. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
  600. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
  601. vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
  602. vex3sources, veximmext and sse2avx.
  603. (i386_operand_type): Add regymm, ymmword and vex_imm4.
  604. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
  605. * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
  606. * i386-init.h: Regenerated.
  607. * i386-tbl.h: Likewise.
  608. 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
  609. From Robin Getz <robin.getz@analog.com>
  610. * bfin-dis.c (bu32): Typedef.
  611. (enum const_forms_t): Add c_uimm32 and c_huimm32.
  612. (constant_formats[]): Add uimm32 and huimm16.
  613. (fmtconst_val): New.
  614. (uimm32): Define.
  615. (huimm32): Define.
  616. (imm16_val): Define.
  617. (luimm16_val): Define.
  618. (struct saved_state): Define.
  619. (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
  620. A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
  621. LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
  622. (get_allreg): New.
  623. (decode_LDIMMhalf_0): Print out the whole register value.
  624. From Jie Zhang <jie.zhang@analog.com>
  625. * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
  626. multiply and multiply-accumulate to data register instruction.
  627. * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
  628. c_imm32, c_huimm32e): Define.
  629. (constant_formats): Add flags for printing decimal, leading spaces, and
  630. exact symbols.
  631. (comment, parallel): Add global flags in all disassembly.
  632. (fmtconst): Take advantage of new flags, and print default in hex.
  633. (fmtconst_val): Likewise.
  634. (decode_macfunc): Be consistant with spaces, tabs, comments,
  635. capitalization in disassembly, fix minor coding style issues.
  636. (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
  637. (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
  638. decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
  639. decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
  640. decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
  641. decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
  642. decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
  643. decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
  644. decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
  645. decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
  646. _print_insn_bfin, print_insn_bfin): Likewise.
  647. 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
  648. * aclocal.m4: Regenerate.
  649. * configure: Likewise.
  650. * Makefile.in: Likewise.
  651. 2008-03-13 Alan Modra <amodra@bigpond.net.au>
  652. * Makefile.am: Run "make dep-am".
  653. * Makefile.in: Regenerate.
  654. * configure: Regenerate.
  655. 2008-03-07 Alan Modra <amodra@bigpond.net.au>
  656. * ppc-opc.c (powerpc_opcodes): Order and format.
  657. 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
  658. * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
  659. * i386-tbl.h: Regenerated.
  660. 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
  661. * i386-opc.tbl: Disallow 16-bit near indirect branches for
  662. x86-64.
  663. * i386-tbl.h: Regenerated.
  664. 2008-02-21 Jan Beulich <jbeulich@novell.com>
  665. * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
  666. and Fword for far indirect jmp. Allow Reg16 and Word for near
  667. indirect jmp on x86-64. Disallow Fword for lcall.
  668. * i386-tbl.h: Re-generate.
  669. 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  670. * cr16-opc.c (cr16_num_optab): Defined
  671. 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
  672. * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
  673. * i386-init.h: Regenerated.
  674. 2008-02-14 Nick Clifton <nickc@redhat.com>
  675. PR binutils/5524
  676. * configure.in (SHARED_LIBADD): Select the correct host specific
  677. file extension for shared libraries.
  678. * configure: Regenerate.
  679. 2008-02-13 Jan Beulich <jbeulich@novell.com>
  680. * i386-opc.h (RegFlat): New.
  681. * i386-reg.tbl (flat): Add.
  682. * i386-tbl.h: Re-generate.
  683. 2008-02-13 Jan Beulich <jbeulich@novell.com>
  684. * i386-dis.c (a_mode): New.
  685. (cond_jump_mode): Adjust.
  686. (Ma): Change to a_mode.
  687. (intel_operand_size): Handle a_mode.
  688. * i386-opc.tbl: Allow Dword and Qword for bound.
  689. * i386-tbl.h: Re-generate.
  690. 2008-02-13 Jan Beulich <jbeulich@novell.com>
  691. * i386-gen.c (process_i386_registers): Process new fields.
  692. * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
  693. unsigned char. Add dw2_regnum and Dw2Inval.
  694. * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
  695. register names.
  696. * i386-tbl.h: Re-generate.
  697. 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
  698. * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
  699. * i386-init.h: Updated.
  700. 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
  701. * i386-gen.c (cpu_flags): Add CpuXsave.
  702. * i386-opc.h (CpuXsave): New.
  703. (CpuLM): Updated.
  704. (i386_cpu_flags): Add cpuxsave.
  705. * i386-dis.c (MOD_0FAE_REG_4): New.
  706. (RM_0F01_REG_2): Likewise.
  707. (MOD_0FAE_REG_5): Updated.
  708. (RM_0F01_REG_3): Likewise.
  709. (reg_table): Use MOD_0FAE_REG_4.
  710. (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
  711. for xrstor.
  712. (rm_table): Add RM_0F01_REG_2.
  713. * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
  714. * i386-init.h: Regenerated.
  715. * i386-tbl.h: Likewise.
  716. 2008-02-11 Jan Beulich <jbeulich@novell.com>
  717. * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
  718. Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
  719. * i386-tbl.h: Re-generate.
  720. 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
  721. PR 5715
  722. * configure: Regenerated.
  723. 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
  724. * mips-dis.c: Update copyright.
  725. (mips_arch_choices): Add Octeon.
  726. * mips-opc.c: Update copyright.
  727. (IOCT): New macro.
  728. (mips_builtin_opcodes): Add Octeon instruction synciobdma.
  729. 2008-01-29 Alan Modra <amodra@bigpond.net.au>
  730. * ppc-opc.c: Support optional L form mtmsr.
  731. 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
  732. * i386-dis.c (OP_E_extended): Handle r12 like rsp.
  733. 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
  734. * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
  735. * i386-init.h: Regenerated.
  736. 2008-01-23 Tristan Gingold <gingold@adacore.com>
  737. * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
  738. ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
  739. 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
  740. * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
  741. (cpu_flags): Likewise.
  742. * i386-opc.h (CpuMMX2): Removed.
  743. (CpuSSE): Updated.
  744. * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
  745. * i386-init.h: Regenerated.
  746. * i386-tbl.h: Likewise.
  747. 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
  748. * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
  749. CPU_SMX_FLAGS.
  750. * i386-init.h: Regenerated.
  751. 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
  752. * i386-opc.tbl: Use Qword on movddup.
  753. * i386-tbl.h: Regenerated.
  754. 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
  755. * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
  756. * i386-tbl.h: Regenerated.
  757. 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
  758. * i386-dis.c (Mx): New.
  759. (PREFIX_0FC3): Likewise.
  760. (PREFIX_0FC7_REG_6): Updated.
  761. (dis386_twobyte): Use PREFIX_0FC3.
  762. (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
  763. Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
  764. movntss.
  765. 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
  766. * i386-gen.c (opcode_modifiers): Add IntelSyntax.
  767. (operand_types): Add Mem.
  768. * i386-opc.h (IntelSyntax): New.
  769. * i386-opc.h (Mem): New.
  770. (Byte): Updated.
  771. (Opcode_Modifier_Max): Updated.
  772. (i386_opcode_modifier): Add intelsyntax.
  773. (i386_operand_type): Add mem.
  774. * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
  775. instructions.
  776. * i386-reg.tbl: Add size for accumulator.
  777. * i386-init.h: Regenerated.
  778. * i386-tbl.h: Likewise.
  779. 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
  780. * i386-opc.h (Byte): Fix a typo.
  781. 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
  782. PR gas/5534
  783. * i386-gen.c (operand_type_init): Add Dword to
  784. OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
  785. (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
  786. Qword and Xmmword.
  787. (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
  788. Xmmword, Unspecified and Anysize.
  789. (set_bitfield): Make Mmword an alias of Qword. Make Oword
  790. an alias of Xmmword.
  791. * i386-opc.h (CheckSize): Removed.
  792. (Byte): Updated.
  793. (Word): Likewise.
  794. (Dword): Likewise.
  795. (Qword): Likewise.
  796. (Xmmword): Likewise.
  797. (FWait): Updated.
  798. (OTMax): Likewise.
  799. (i386_opcode_modifier): Remove checksize, byte, word, dword,
  800. qword and xmmword.
  801. (Fword): New.
  802. (TBYTE): Likewise.
  803. (Unspecified): Likewise.
  804. (Anysize): Likewise.
  805. (i386_operand_type): Add byte, word, dword, fword, qword,
  806. tbyte xmmword, unspecified and anysize.
  807. * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
  808. Tbyte, Xmmword, Unspecified and Anysize.
  809. * i386-reg.tbl: Add size for accumulator.
  810. * i386-init.h: Regenerated.
  811. * i386-tbl.h: Likewise.
  812. 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
  813. * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
  814. (REG_0F18): Updated.
  815. (reg_table): Updated.
  816. (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
  817. (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
  818. 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
  819. * i386-gen.c (set_bitfield): Use fail () on error.
  820. 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
  821. * i386-gen.c (lineno): New.
  822. (filename): Likewise.
  823. (set_bitfield): Report filename and line numer on error.
  824. (process_i386_opcodes): Set filename and update lineno.
  825. (process_i386_registers): Likewise.
  826. 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
  827. * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
  828. ATTSyntax.
  829. * i386-opc.h (IntelMnemonic): Renamed to ..
  830. (ATTSyntax): This
  831. (Opcode_Modifier_Max): Updated.
  832. (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
  833. and intelsyntax.
  834. * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
  835. on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
  836. * i386-tbl.h: Regenerated.
  837. 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
  838. * i386-gen.c: Update copyright to 2008.
  839. * i386-opc.h: Likewise.
  840. * i386-opc.tbl: Likewise.
  841. * i386-init.h: Regenerated.
  842. * i386-tbl.h: Likewise.
  843. 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
  844. * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
  845. pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
  846. * i386-tbl.h: Regenerated.
  847. 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
  848. * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
  849. CpuSSE4_2_Or_ABM.
  850. (cpu_flags): Likewise.
  851. * i386-opc.h (CpuSSE4_1_Or_5): Removed.
  852. (CpuSSE4_2_Or_ABM): Likewise.
  853. (CpuLM): Updated.
  854. (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
  855. * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
  856. Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
  857. and CpuPadLock, respectively.
  858. * i386-init.h: Regenerated.
  859. * i386-tbl.h: Likewise.
  860. 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
  861. * i386-gen.c (opcode_modifiers): Remove No_xSuf.
  862. * i386-opc.h (No_xSuf): Removed.
  863. (CheckSize): Updated.
  864. * i386-tbl.h: Regenerated.
  865. 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
  866. * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
  867. CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
  868. CPU_SSE5_FLAGS.
  869. (cpu_flags): Add CpuSSE4_2_Or_ABM.
  870. * i386-opc.h (CpuSSE4_2_Or_ABM): New.
  871. (CpuLM): Updated.
  872. (i386_cpu_flags): Add cpusse4_2_or_abm.
  873. * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
  874. CpuABM|CpuSSE4_2 on popcnt.
  875. * i386-init.h: Regenerated.
  876. * i386-tbl.h: Likewise.
  877. 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
  878. * i386-opc.h: Update comments.
  879. 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
  880. * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
  881. * i386-opc.h: Likewise.
  882. * i386-opc.tbl: Likewise.
  883. 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
  884. PR gas/5534
  885. * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
  886. Byte, Word, Dword, QWord and Xmmword.
  887. * i386-opc.h (No_xSuf): New.
  888. (CheckSize): Likewise.
  889. (Byte): Likewise.
  890. (Word): Likewise.
  891. (Dword): Likewise.
  892. (QWord): Likewise.
  893. (Xmmword): Likewise.
  894. (FWait): Updated.
  895. (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
  896. Dword, QWord and Xmmword.
  897. * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
  898. used.
  899. * i386-tbl.h: Regenerated.
  900. 2008-01-02 Mark Kettenis <kettenis@gnu.org>
  901. * m88k-dis.c (instructions): Fix fcvt.* instructions.
  902. From Miod Vallat.
  903. For older changes see ChangeLog-2007
  904. Copyright (C) 2008 Free Software Foundation, Inc.
  905. Copying and distribution of this file, with or without modification,
  906. are permitted in any medium without royalty provided the copyright
  907. notice and this notice are preserved.
  908. Local Variables:
  909. mode: change-log
  910. left-margin: 8
  911. fill-column: 74
  912. version-control: never
  913. End: