aarch64.h 4.4 KB

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  1. /* Common target-dependent functionality for AArch64.
  2. Copyright (C) 2017-2022 Free Software Foundation, Inc.
  3. This file is part of GDB.
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 3 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program. If not, see <http://www.gnu.org/licenses/>. */
  14. #ifndef ARCH_AARCH64_H
  15. #define ARCH_AARCH64_H
  16. #include "gdbsupport/tdesc.h"
  17. /* Holds information on what architectural features are available. This is
  18. used to select register sets. */
  19. struct aarch64_features
  20. {
  21. bool sve = false;
  22. bool pauth = false;
  23. bool mte = false;
  24. };
  25. /* Create the aarch64 target description. A non zero VQ value indicates both
  26. the presence of SVE and the Vector Quotient - the number of 128bit chunks in
  27. an SVE Z register. HAS_PAUTH_P indicates the presence of the PAUTH
  28. feature.
  29. MTE_P indicates the presence of the Memory Tagging Extension feature. */
  30. target_desc *aarch64_create_target_description (uint64_t vq, bool has_pauth_p,
  31. bool mte_p);
  32. /* Register numbers of various important registers.
  33. Note that on SVE, the Z registers reuse the V register numbers and the V
  34. registers become pseudo registers. */
  35. enum aarch64_regnum
  36. {
  37. AARCH64_X0_REGNUM, /* First integer register. */
  38. AARCH64_FP_REGNUM = AARCH64_X0_REGNUM + 29, /* Frame register, if used. */
  39. AARCH64_LR_REGNUM = AARCH64_X0_REGNUM + 30, /* Return address. */
  40. AARCH64_SP_REGNUM, /* Stack pointer. */
  41. AARCH64_PC_REGNUM, /* Program counter. */
  42. AARCH64_CPSR_REGNUM, /* Current Program Status Register. */
  43. AARCH64_V0_REGNUM, /* First fp/vec register. */
  44. AARCH64_V31_REGNUM = AARCH64_V0_REGNUM + 31, /* Last fp/vec register. */
  45. AARCH64_SVE_Z0_REGNUM = AARCH64_V0_REGNUM, /* First SVE Z register. */
  46. AARCH64_SVE_Z31_REGNUM = AARCH64_V31_REGNUM, /* Last SVE Z register. */
  47. AARCH64_FPSR_REGNUM, /* Floating Point Status Register. */
  48. AARCH64_FPCR_REGNUM, /* Floating Point Control Register. */
  49. AARCH64_SVE_P0_REGNUM, /* First SVE predicate register. */
  50. AARCH64_SVE_P15_REGNUM = AARCH64_SVE_P0_REGNUM + 15, /* Last SVE predicate
  51. register. */
  52. AARCH64_SVE_FFR_REGNUM, /* SVE First Fault Register. */
  53. AARCH64_SVE_VG_REGNUM, /* SVE Vector Granule. */
  54. /* Other useful registers. */
  55. AARCH64_LAST_X_ARG_REGNUM = AARCH64_X0_REGNUM + 7,
  56. AARCH64_STRUCT_RETURN_REGNUM = AARCH64_X0_REGNUM + 8,
  57. AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
  58. };
  59. #define V_REGISTER_SIZE 16
  60. /* Pseudo register base numbers. */
  61. #define AARCH64_Q0_REGNUM 0
  62. #define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
  63. #define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
  64. #define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
  65. #define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
  66. #define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
  67. #define AARCH64_PAUTH_DMASK_REGNUM(pauth_reg_base) (pauth_reg_base)
  68. #define AARCH64_PAUTH_CMASK_REGNUM(pauth_reg_base) (pauth_reg_base + 1)
  69. #define AARCH64_PAUTH_REGS_SIZE (16)
  70. #define AARCH64_X_REGS_NUM 31
  71. #define AARCH64_V_REGS_NUM 32
  72. #define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM
  73. #define AARCH64_SVE_P_REGS_NUM 16
  74. #define AARCH64_NUM_REGS AARCH64_FPCR_REGNUM + 1
  75. #define AARCH64_SVE_NUM_REGS AARCH64_SVE_VG_REGNUM + 1
  76. /* There are a number of ways of expressing the current SVE vector size:
  77. VL : Vector Length.
  78. The number of bytes in an SVE Z register.
  79. VQ : Vector Quotient.
  80. The number of 128bit chunks in an SVE Z register.
  81. VG : Vector Granule.
  82. The number of 64bit chunks in an SVE Z register. */
  83. #define sve_vg_from_vl(vl) ((vl) / 8)
  84. #define sve_vl_from_vg(vg) ((vg) * 8)
  85. #ifndef sve_vq_from_vl
  86. #define sve_vq_from_vl(vl) ((vl) / 0x10)
  87. #endif
  88. #ifndef sve_vl_from_vq
  89. #define sve_vl_from_vq(vq) ((vq) * 0x10)
  90. #endif
  91. #define sve_vq_from_vg(vg) (sve_vq_from_vl (sve_vl_from_vg (vg)))
  92. #define sve_vg_from_vq(vq) (sve_vg_from_vl (sve_vl_from_vq (vq)))
  93. /* Maximum supported VQ value. Increase if required. */
  94. #define AARCH64_MAX_SVE_VQ 16
  95. #endif /* ARCH_AARCH64_H */